TCS / Research / Publications / Circuits Insensitive to Delays in Transistors and Wires
Helsinki University of Technology, 
     Laboratory for Theoretical Computer Science

Circuits Insensitive to Delays in Transistors and Wires

Reference:

Victor Varshavsky. Circuits insensitive to delays in transistors and wires. Technical Report B7, Helsinki University of Technology, Digital Systems Laboratory, Espoo, Finland, November 1989.

Suggested BibTeX entry:

@techreport{HUT-TCS-B7,
    address = {Espoo, Finland},
    author = {Victor Varshavsky},
    institution = {Helsinki University of Technology, Digital Systems Laboratory},
    month = {November},
    number = {B7},
    pages = {42},
    title = {Circuits Insensitive to Delays in Transistors and Wires},
    type = {Technical Report},
    year = {1989},
}

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